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(parent: 78a63a3) | patch
s5j/clk: modify SPI clk rate
authorJunhwan Park <junhwan.park@samsung.com>
Thu, 12 Oct 2017 05:50:35 +0000 (14:50 +0900)
committersunghan-chang <sh924.chang@samsung.com>
Thu, 12 Oct 2017 05:50:35 +0000 (14:50 +0900)
commit730ecb1a6a715b1f07b83f553e70e35200f889e8
tree4ad5b60f1913e195687d819ada21f8e3b151020dtree | snapshot
parent78a63a39a053ce718108b2e10eeaf677f3214a5bcommit | diff
s5j/clk: modify SPI clk rate

- An SPI contains an internal 1/2 clock divider. Configure the SCLK_SPI
  value to the double of an SPI operating clock frequency.

- When you check the source without the commit log, it can be difficult to
  understand why you doubled it. I added a comment.

Change-Id: I8efd88dec2166ae5241f13a08d2c18438d26bb9b
Signed-off-by: Junhwan Park <junhwan.park@samsung.com>
os/arch/arm/src/s5j/s5j_clock.c diff | blob | history
Domain: TinyAra / TinyAra Platform;