clk: hi6220: Clock driver support for Hisilicon hi6220 SoC
authorBintian Wang <bintian.wang@huawei.com>
Fri, 29 May 2015 02:08:38 +0000 (10:08 +0800)
committerMichael Turquette <mturquette@linaro.org>
Wed, 3 Jun 2015 22:12:25 +0000 (15:12 -0700)
commit72ea48610d43c59507d9ad39083d40085400ba12
tree826b1a5073246280adf5d90dbbecf492848af009
parent2a40a2ea109269def06f991f771c2bf2f6c0f396
clk: hi6220: Clock driver support for Hisilicon hi6220 SoC

Add clock drivers for hi6220 SoC, this driver controls the SoC
registers to supply different clocks to different IPs in the SoC.

We add one divider clock for hi6220 because the divider in hi6220
also has a mask bit but it doesnot obey the rule defined by flag
"CLK_DIVIDER_HIWORD_MASK", we can not get index of the mask bit by
left shift fixed bits (e.g. 16 bits), so we add this divider clock
to handle it.

Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
Signed-off-by: Bintian Wang <bintian.wang@huawei.com>
Acked-by: Haojian Zhuang <haojian.zhuang@linaro.org>
Reviewed-by: Zhangfei Gao <zhangfei.gao@linaro.org>
Tested-by: Will Deacon <will.deacon@arm.com>
Tested-by: Tyler Baker <tyler.baker@linaro.org>
Tested-by: Kevin Hilman <khilman@linaro.org>
Signed-off-by: Michael Turquette <mturquette@linaro.org>
drivers/clk/Kconfig
drivers/clk/Makefile
drivers/clk/hisilicon/Kconfig [new file with mode: 0644]
drivers/clk/hisilicon/Makefile
drivers/clk/hisilicon/clk-hi6220.c [new file with mode: 0644]
drivers/clk/hisilicon/clk.c
drivers/clk/hisilicon/clk.h
drivers/clk/hisilicon/clkdivider-hi6220.c [new file with mode: 0644]