drm/i915/icl:Add Wa_1606682166
authorAnuj Phogat <anuj.phogat@gmail.com>
Thu, 4 Oct 2018 18:29:39 +0000 (11:29 -0700)
committerMika Kuoppala <mika.kuoppala@linux.intel.com>
Tue, 9 Oct 2018 07:02:03 +0000 (10:02 +0300)
commit71ffd49cc9b9da5d9e97b5153ee1fe33dfd61a43
tree23331d0619c6b5ba8c4e213012fbf984699ab222
parent0c7d2aedf51b0a9f728ec6e921eaa8f82a47db91
drm/i915/icl:Add Wa_1606682166

Incorrect TDL's SSP address shift in SARB for 16:6 & 18:8 modes.
Disable the Sampler state prefetch functionality in the SARB by
programming 0xB000[30] to '1'. This is to be done at boot time
and the feature must remain disabled permanently.

Fixes flaky tex-mip-level-selection* piglit tests with Mesa i965
driver.

Cc: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Signed-off-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20181004182939.7668-6-radhakrishna.sripada@intel.com
drivers/gpu/drm/i915/i915_reg.h
drivers/gpu/drm/i915/intel_workarounds.c