riscv: Fix P4D_SHIFT definition for 3-level page table mode
authorAlexandre Ghiti <alexghiti@rivosinc.com>
Thu, 1 Dec 2022 13:51:28 +0000 (14:51 +0100)
committerPalmer Dabbelt <palmer@rivosinc.com>
Tue, 13 Dec 2022 06:38:18 +0000 (22:38 -0800)
commit71fc3621efc38ace9640ee6a0db3300900689592
tree8fc90cb764c35cdc0ba1fc107cb1dc2e8073df6b
parente923f4625ed3ad7656c3f9f086c898798bafbbc5
riscv: Fix P4D_SHIFT definition for 3-level page table mode

RISC-V kernels support 3,4,5-level page tables at runtime by folding
upper levels.

In case of a 3-level page table, PGDIR is folded into P4D which in turn
is folded into PUD: PGDIR_SHIFT value is correctly set to the same value
as PUD_SHIFT, but P4D_SHIFT is not, then any use of P4D_SHIFT will access
invalid address bits (all set to 1).

Fix this by dynamically defining P4D_SHIFT value, like we already do for
PGDIR_SHIFT.

Fixes: d10efa21a937 ("riscv: mm: Control p4d's folding by pgtable_l5_enabled")
Signed-off-by: Alexandre Ghiti <alexghiti@rivosinc.com>
Reviewed-by: Palmer Dabbelt <palmer@rivosinc.com>
Link: https://lore.kernel.org/r/20221201135128.1482189-2-alexghiti@rivosinc.com
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
arch/riscv/include/asm/pgtable-64.h