[VP][RISCV] Add vp.rint and RISC-V support.
authorYeting Kuo <yeting.kuo@sifive.com>
Mon, 24 Oct 2022 15:40:48 +0000 (23:40 +0800)
committerYeting Kuo <yeting.kuo@sifive.com>
Tue, 1 Nov 2022 06:52:47 +0000 (14:52 +0800)
commit71e4e35581bb5972d71f1b887b61a9eeefcfb927
tree29ddfe1498072e0059dd16fd34bdb5e3d1c5dfa8
parent11d844f96dfb6cf6105cdfa8ebfe518f77bb988a
[VP][RISCV] Add vp.rint and RISC-V support.

FRINT uses dynamic rounding mode instead of static rounding mode. The patch
rename VFCVT_X_F_VL to VFCVT_RM_X_F_VL for static rounding mode uses and added
new ISDNode VFCVT_X_F_VL directly selected to PseudoVFCVT_X_F_V.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D136662
12 files changed:
llvm/docs/LangRef.rst
llvm/include/llvm/IR/Intrinsics.td
llvm/include/llvm/IR/VPIntrinsics.def
llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
llvm/lib/Target/RISCV/RISCVISelLowering.cpp
llvm/lib/Target/RISCV/RISCVISelLowering.h
llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td
llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
llvm/test/Analysis/CostModel/RISCV/fround.ll
llvm/test/CodeGen/RISCV/rvv/fixed-vectors-rint-vp.ll [new file with mode: 0644]
llvm/test/CodeGen/RISCV/rvv/rint-vp.ll [new file with mode: 0644]
llvm/unittests/IR/VPIntrinsicTest.cpp