[MIRParser] Diagnose too large align values in MachineMemOperands
authorJay Foad <jay.foad@amd.com>
Wed, 23 Feb 2022 11:35:55 +0000 (11:35 +0000)
committerJay Foad <jay.foad@amd.com>
Thu, 24 Feb 2022 15:32:08 +0000 (15:32 +0000)
commit719bac55dff141c6f68fe3045f42b78a41e84d79
treef1fb412339080480fef8a9a63077c4f3deb9fb8e
parent1fa125111607e2e00e3ce23f69fbc0ce9bb2a207
[MIRParser] Diagnose too large align values in MachineMemOperands

When parsing MachineMemOperands, MIRParser treated the "align" keyword
the same as "basealign". Really "basealign" should specify the
alignment of the MachinePointerInfo base value, and "align" should
specify the alignment of that base value plus the offset.

This worked OK when the specified alignment was no larger than the
alignment of the offset, but in cases like this it just caused
confusion:

    STW killed %18, 4, %stack.1.ap2.i.i :: (store (s32) into %stack.1.ap2.i.i + 4, align 8)

MIRPrinter would never have printed this, with an offset of 4 but an
align of 8, so it must have been written by hand. MIRParser would
interpret "align 8" as "basealign 8", but I think it is better to give
an error and force the user to write "basealign 8" if that is what they
really meant.

Differential Revision: https://reviews.llvm.org/D120400

Change-Id: I7eeeefc55c2df3554ba8d89f8809a2f45ada32d8
llvm/lib/CodeGen/MIRParser/MILexer.cpp
llvm/lib/CodeGen/MIRParser/MIParser.cpp
llvm/test/CodeGen/AMDGPU/merge-global-load-store.mir
llvm/test/CodeGen/MIR/Generic/aligned-memoperands-err.mir [new file with mode: 0644]
llvm/test/CodeGen/MIR/Generic/aligned-memoperands.mir [new file with mode: 0644]
llvm/test/CodeGen/Mips/msa/emergency-spill.mir
llvm/test/CodeGen/PowerPC/stack-coloring-vararg.mir
llvm/test/DebugInfo/AArch64/asan-stack-vars.mir