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(parent: ebd2622) | patch
hwrng: mpfs - add polarfire soc hwrng support
authorConor Dooley <conor.dooley@microchip.com>
Fri, 8 Apr 2022 10:09:12 +0000 (10:09 +0000)
committerHerbert Xu <herbert@gondor.apana.org.au>
Fri, 15 Apr 2022 08:34:28 +0000 (16:34 +0800)
commit716a757c83ad6208a743dd8fb1577055d0867ee8
tree9a24dc6317feec4b3b976861352cc60f87294f88tree | snapshot
parentebd26229a7b343268c231008f295841ef45d0b96commit | diff
hwrng: mpfs - add polarfire soc hwrng support

Add a driver to access the hardware random number generator on the
Polarfire SoC. The hwrng can only be accessed via the system controller,
so use the mailbox interface the system controller exposes to access the
hwrng.

Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
drivers/char/hw_random/Kconfig diff | blob | history
drivers/char/hw_random/Makefile diff | blob | history
drivers/char/hw_random/mpfs-rng.c [new file with mode: 0644] blob
Domain: System / Kernel;