pinctrl: sh-pfc: r8a7795: Fix MOD_SEL2 bit26 to 0x0 when using SCK5_A
authorTakeshi Kihara <takeshi.kihara.df@renesas.com>
Fri, 28 Jul 2017 11:41:14 +0000 (20:41 +0900)
committerGeert Uytterhoeven <geert+renesas@glider.be>
Wed, 16 Aug 2017 12:26:25 +0000 (14:26 +0200)
commit712f36fbb7738a60df0622e950726b6977dd41f3
treee8a00d8ac351331e46e48b2ad217fd4ba443786e
parent50d83156e84ee5112fa07a0033eef4e58110709d
pinctrl: sh-pfc: r8a7795: Fix MOD_SEL2 bit26 to 0x0 when using SCK5_A

This patch fixes the implementation incorrect of MOD_SEL2 bit26 value
when SCK5_A pin function is selected for IPSR16 bit[31:28].

This is a correction to the incorrect implementation of MOD_SEL register
pin assignment for R8A7795 ES2.0 SoC specification of R-Car Gen3 Hardware
User's Manual Rev.0.51E or later.

Fixes: b205914c8f822ef2 ("pinctrl: sh-pfc: r8a7795: Add support for R-Car H3 ES2.0")
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: Yoshihiro Kaneko <ykaneko0929@gmail.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
drivers/pinctrl/sh-pfc/pfc-r8a7795.c