ddr: altera: Zero DM IN delay in scc_mgr_zero_group()
authorMarek Vasut <marex@denx.de>
Mon, 4 Apr 2016 19:16:18 +0000 (21:16 +0200)
committerMarek Vasut <marex@denx.de>
Wed, 20 Apr 2016 09:28:45 +0000 (11:28 +0200)
commit70ed80af46e58a25d472362fe5552e1e49eaf25b
treea6eec9f88741935b64ae39157a42f17aab48878e
parentf3f777cdf00433866b1178e23a9a99e2eaf7d89e
ddr: altera: Zero DM IN delay in scc_mgr_zero_group()

This one last set of delay configuration registers was not properly
zeroed out originally, fix it and zero them out.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Chin Liang See <clsee@altera.com>
drivers/ddr/altera/sequencer.c