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[turbofan] Reduce shl with sar/shr and same shift amount to bit-and.
authorbmeurer@chromium.org <bmeurer@chromium.org>
Fri, 26 Sep 2014 07:35:59 +0000 (07:35 +0000)
committerbmeurer@chromium.org <bmeurer@chromium.org>
Fri, 26 Sep 2014 07:35:59 +0000 (07:35 +0000)
commit7099d635ee9cdfe9f3933e4030633e11fa4d1a78
treee48e181877b3584a8d0e585bd8e21f289c58ed0btree | snapshot
parent8ff496edfb21da28a4be73f041914d5a0ee31d27commit | diff
[turbofan] Reduce shl with sar/shr and same shift amount to bit-and.

The shl(sar(x, K), K) is a common pattern with typed loads/stores in
asm.js.

TEST=compiler-unittests,mjsunit/asm/int32array-unaligned
R=jarin@chromium.org

Review URL: https://codereview.chromium.org/598083007

git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@24238 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
src/compiler/machine-operator-reducer-unittest.cc diff | blob | history
src/compiler/machine-operator-reducer.cc diff | blob | history
src/compiler/machine-operator-reducer.h diff | blob | history
test/mjsunit/asm/int32array-unaligned.js [new file with mode: 0644] blob
Domain: Web Framework / Web Engine;