PR middle-end/32889
authordanglin <danglin@138bc75d-0d04-0410-961f-82ee72b054a4>
Sun, 9 Dec 2007 18:02:08 +0000 (18:02 +0000)
committerdanglin <danglin@138bc75d-0d04-0410-961f-82ee72b054a4>
Sun, 9 Dec 2007 18:02:08 +0000 (18:02 +0000)
commit7050ff73578669785fb35072459803d2ecadc11d
tree6c03efab36b85bc299f7ba354cfa23f643d60a6a
parent1c79cc8c0c30803e49c4de328c802c118145d3e0
PR middle-end/32889
PR target/34091
* pa.md: Consolidate HImode and QImode move patterns into one pattern
each, eliminating floating-point alternatives.
* pa-protos.h (pa_cannot_change_mode_class, pa_modes_tieable_p):
Declare functions.
* pa-64.h (SECONDARY_MEMORY_NEEDED): Define here.
* pa.c (pa_secondary_reload): Use an intermediate general register
for copies to/from floating-point register classes.  Simplify code
SHIFT_REGS class.  Provide additional comments.
(pa_cannot_change_mode_class, pa_modes_tieable_p): New functions.
* pa.h (MODES_TIEABLE_P): Use pa_modes_tieable_p.
(SECONDARY_MEMORY_NEEDED): Delete define.
(INT14_OK_STRICT): Define.
(MODE_OK_FOR_SCALED_INDEXING_P): Allow SFmode and DFmode when using
soft float.
(MODE_OK_FOR_UNSCALED_INDEXING_P): Likewise.
(GO_IF_LEGITIMATE_ADDRESS): Use INT14_OK_STRICT in REG+D case for
SFmode and DFmode.
(LEGITIMIZE_RELOAD_ADDRESS): Use INT14_OK_STRICT in mask selection.
Align DImode offsets when generating 64-bit code.
* pa32-regs.h (VALID_FP_MODE_P): Remove QImode and HImode.
(CANNOT_CHANGE_MODE_CLASS): Define.
* pa64-regs.h (VALID_FP_MODE_P): Remove QImode and HImode.
(CANNOT_CHANGE_MODE_CLASS): Define using pa_cannot_change_mode_class.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@130725 138bc75d-0d04-0410-961f-82ee72b054a4
gcc/ChangeLog
gcc/config/pa/pa-64.h
gcc/config/pa/pa-protos.h
gcc/config/pa/pa.c
gcc/config/pa/pa.h
gcc/config/pa/pa.md
gcc/config/pa/pa32-regs.h
gcc/config/pa/pa64-regs.h