[InstCombine] auto-generate assertions for tighter checking
authorSanjay Patel <spatel@rotateright.com>
Fri, 2 Sep 2016 19:38:37 +0000 (19:38 +0000)
committerSanjay Patel <spatel@rotateright.com>
Fri, 2 Sep 2016 19:38:37 +0000 (19:38 +0000)
commit70277411d3dd780ae794da3621204823bb9344f8
treec7c4891e96323d15e1256f042bca5d7bdd6d632c
parent788c5d65e870eac222c9c02fad5cbc2e102c9e9e
[InstCombine] auto-generate assertions for tighter checking

llvm-svn: 280531
llvm/test/Transforms/InstCombine/vec_demanded_elts.ll