pinctrl: sh-pfc: r8a7796: Fix MSIOF3_{SS1,SS2}_E pin function definitions
authorTakeshi Kihara <takeshi.kihara.df@renesas.com>
Thu, 1 Jun 2017 13:37:24 +0000 (22:37 +0900)
committerGeert Uytterhoeven <geert+renesas@glider.be>
Mon, 17 Jul 2017 08:51:32 +0000 (10:51 +0200)
commit70070190871f831ceb46cce6c2b9a1038d1802cf
tree324fecaa351e04aba0d9d4868dc2fa943a8f55a4
parent3e6c7727c08a0d53e019444c7976bd9a2eb091b6
pinctrl: sh-pfc: r8a7796: Fix MSIOF3_{SS1,SS2}_E pin function definitions

This patch fixes the incorrect IPSR register value definitions for
MSIOF3_{SS1,SS2}_E pin functions.

This is a correction to the incorrect implementation of IPSR register
pin assignment for R8A7796 SoC specification of R-Car Gen3 Hardware
User's Manual Rev.0.51E or later.

Fixes: f9aece7344bd81ce ("pinctrl: sh-pfc: Initial R8A7796 PFC support")
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
[geert: Reword]
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
drivers/pinctrl/sh-pfc/pfc-r8a7796.c