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(parent: e3d3327) | patch
[GlobalISel][AArch64] Combine G_SEXT_INREG + right shift -> G_SBFX
authorJessica Paquette <jpaquette@apple.com>
Tue, 23 Mar 2021 22:33:10 +0000 (15:33 -0700)
committerJessica Paquette <jpaquette@apple.com>
Tue, 30 Mar 2021 17:14:30 +0000 (10:14 -0700)
commit700431128e212d5ef53afb6d20da098ca264cadd
tree35f3f4bd1d22c128a14c3fe2559f90f34f8193fatree | snapshot
parente3d3327edbf133da6ed50767eed4560a541a751dcommit | diff
[GlobalISel][AArch64] Combine G_SEXT_INREG + right shift -> G_SBFX

Basically a port of isBitfieldExtractOpFromSExtInReg in AArch64ISelDAGToDAG.

This is only done post-legalization for now. Once the legalizer knows how to
decompose these back into shifts, this requirement can probably be removed.

Differential Revision: https://reviews.llvm.org/D99230
llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h diff | blob | history
llvm/include/llvm/Target/GlobalISel/Combine.td diff | blob | history
llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp diff | blob | history
llvm/lib/Target/AArch64/AArch64Combine.td diff | blob | history
llvm/lib/Target/AArch64/GISel/AArch64PostLegalizerCombiner.cpp diff | blob | history
llvm/test/CodeGen/AArch64/GlobalISel/form-bitfield-extract-from-sextinreg.mir [new file with mode: 0644] blob
Domain: System / Toolchain;