clk: renesas: Add r8a7744 CPG Core Clock Definitions
authorBiju Das <biju.das@bp.renesas.com>
Tue, 11 Sep 2018 10:12:48 +0000 (11:12 +0100)
committerGeert Uytterhoeven <geert+renesas@glider.be>
Wed, 19 Sep 2018 14:37:56 +0000 (16:37 +0200)
commit6ff9cb53dabca55952ef66853ff145f7c424f6bd
tree4cadf484b3add36ef9e36e17e663fbaca70cbb0a
parentbbd71915ee9c56cc585c76b4b3aee791152ffbff
clk: renesas: Add r8a7744 CPG Core Clock Definitions

Add all RZ/G1N Clock Pulse Generator Core Clock Outputs, as listed in
Table 7.2b ("List of Clocks [RZ/G1M/N]") of the RZ/G1 Hardware User's
Manual.

Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
include/dt-bindings/clock/r8a7744-cpg-mssr.h [new file with mode: 0644]