irqchip/gic-v3: Workaround for GIC-700 erratum 2941627
authorLorenzo Pieralisi <lpieralisi@kernel.org>
Tue, 4 Jul 2023 15:50:34 +0000 (17:50 +0200)
committerMarc Zyngier <maz@kernel.org>
Tue, 11 Jul 2023 08:04:31 +0000 (09:04 +0100)
commit6fe5c68ee6a1aae0ef291a56001e7888de547fa2
treed1ff279888b87f9f0a5c9771f4be3accab0eca38
parent567f67acac94e7bbc4cb4b71ff9773555d02609a
irqchip/gic-v3: Workaround for GIC-700 erratum 2941627

GIC700 erratum 2941627 may cause GIC-700 missing SPIs wake
requests when SPIs are deactivated while targeting a
sleeping CPU - ie a CPU for which the redistributor:

GICR_WAKER.ProcessorSleep == 1

This runtime situation can happen if an SPI that has been
activated on a core is retargeted to a different core, it
becomes pending and the target core subsequently enters a
power state quiescing the respective redistributor.

When this situation is hit, the de-activation carried out
on the core that activated the SPI (through either ICC_EOIR1_EL1
or ICC_DIR_EL1 register writes) does not trigger a wake
requests for the sleeping GIC redistributor even if the SPI
is pending.

Work around the erratum by de-activating the SPI using the
redistributor GICD_ICACTIVER register if the runtime
conditions require it (ie the IRQ was retargeted between
activation and de-activation).

Signed-off-by: Lorenzo Pieralisi <lpieralisi@kernel.org>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20230704155034.148262-1-lpieralisi@kernel.org
Documentation/arm64/silicon-errata.rst
drivers/irqchip/irq-gic-v3.c