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(parent: 31d5ef2) | patch
clk: renesas: r9a07g044: Add LCDC clock and reset entries
authorBiju Das <biju.das.jz@bp.renesas.com>
Sat, 30 Apr 2022 11:41:55 +0000 (12:41 +0100)
committerGeert Uytterhoeven <geert+renesas@glider.be>
Thu, 5 May 2022 10:10:21 +0000 (12:10 +0200)
commit6f6178f1e1250d959ef19f408f0e392ea29de665
treedd27f984613062be3113a8ac5205a8689e0ea0c0tree | snapshot
parent31d5ef2f565d2378d9a615f89e4ff86d3d87eb80commit | diff
clk: renesas: r9a07g044: Add LCDC clock and reset entries

Add LCDC clock and reset entries to CPG driver.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20220430114156.6260-9-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
drivers/clk/renesas/r9a07g044-cpg.c diff | blob | history
Domain: System / Kernel;