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soc/tegra: fuse: Update nvmem cell list
authorkartik <kkartik@nvidia.com>
Mon, 6 Dec 2021 11:52:45 +0000 (17:22 +0530)
committerThierry Reding <treding@nvidia.com>
Thu, 24 Feb 2022 16:09:13 +0000 (17:09 +0100)
commit6f259bf1619bbff6118c1e556044c0cb4020bbb6
tree37de41a980090dc4d121c6efb5e4cff823e7bad0tree | snapshot
parent1e5cf1452eb0f17b6bd6d51786c7b39ba175f340commit | diff
soc/tegra: fuse: Update nvmem cell list

Update tegra_fuse_cells with below entries:

 - gcplex-config-fuse:
     Configuration bits for GPU, used to enable/disable write protected
     region used for storing GPU firmware.
 - pdi0:
     Unique per chip public identifier.
 - pdi1:
     Unique per chip public identifier.

Signed-off-by: Prathamesh Shete <pshete@nvidia.com>
Signed-off-by: Kartik <kkartik@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
drivers/soc/tegra/fuse/fuse-tegra.c diff | blob | history
Domain: System / Kernel;