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clk: uniphier: add additional ethernet clock lines for Pro4
authorKunihiko Hayashi <hayashi.kunihiko@socionext.com>
Fri, 30 Mar 2018 09:44:14 +0000 (18:44 +0900)
committerStephen Boyd <sboyd@kernel.org>
Thu, 5 Apr 2018 22:03:51 +0000 (15:03 -0700)
commit6f1aa4ef3f78cc0b42aa1b4c61e356523d88e680
tree1eb7304e5d72c615cda2d3f61a73d2e062e72544tree | snapshot
parent54e1f7ee1f5e8ec8b56e89fc431b3d07f84e9cbdcommit | diff
clk: uniphier: add additional ethernet clock lines for Pro4

Pro4 SoC has clock lines for Giga-bit feature and ethernet phy,
and these are mandatory to activate the ethernet controller. This adds
support for the clock lines.

Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
drivers/clk/uniphier/clk-uniphier-sys.c diff | blob | history
Domain: System / Kernel;