[AArch64][SVE] Add more intrinsics in 'isZeroingInactiveLanes'.
authorchendewen <chendewen3@huawei.com>
Tue, 17 Jan 2023 01:47:35 +0000 (09:47 +0800)
committerzhongyunde <zhongyunde@huawei.com>
Tue, 17 Jan 2023 01:56:31 +0000 (09:56 +0800)
commit6ef6b2b5162ef48a63fb2697d77cffa6d7b1f7e7
tree2fe978a30b07444bd794b51ceae2f5a55cbe0ec6
parent59bc64c667f3e1fb724a4180ed2e6c78857d918e
[AArch64][SVE] Add more intrinsics in 'isZeroingInactiveLanes'.

    The REINTERPRET_CAST operation generates redundant and and ptrue instructions.
    For some instructions, this is redundant, because its inactive lanes are zeroed by construction.
    For example. Codegen before:
    ```
    facgt p2.d, p0/z, z4.d, z1.d
    ptrue p1.d
    and p1.b, p2/z, p2.b, p1.b
    ```
    After:
    ```
    facgt p1.d, p0/z, z4.d, z1.d
    ```
    ref: https://reviews.llvm.org/D129851

    Reviewed By:sdesmalen

    Differential Revision:https://reviews.llvm.org/D141469
llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
llvm/test/CodeGen/AArch64/sve2-intrinsics-reinterpret.ll [new file with mode: 0644]