RISC-V: Implement movmemsi
authorAndrew Waterman <andrew@sifive.com>
Tue, 7 Nov 2017 17:09:39 +0000 (17:09 +0000)
committerPalmer Dabbelt <palmer@gcc.gnu.org>
Tue, 7 Nov 2017 17:09:39 +0000 (17:09 +0000)
commit6ed01e6b282fa9eb5d19ab8bc829d821f624103e
tree572f7f70b0efc8ad8987a83d24131725bdb8be01
parent4d30a85ecee179acc22a213653f4c03028994a6b
RISC-V: Implement movmemsi

Without this we aren't getting proper memcpy inlining on RISC-V systems,
which is particularly disastrous for Dhrystone performance on RV32IM
systems.

gcc/ChangeLog

2017-11-07  Andrew Waterman  <andrew@sifive.com>

        * config/riscv/riscv-protos.h (riscv_hard_regno_nregs): New
        prototype.
        (riscv_expand_block_move): Likewise.
        gcc/config/riscv/riscv.h (MOVE_RATIO): Tune cost to movmemsi
        implementation.
        (RISCV_MAX_MOVE_BYTES_PER_LOOP_ITER): New define.
        (RISCV_MAX_MOVE_BYTES_STRAIGHT): New define.
        gcc/config/riscv/riscv.c (riscv_block_move_straight): New
        function.
        (riscv_adjust_block_mem): Likewise.
        (riscv_block_move_loop): Likewise.
        (riscv_expand_block_move): Likewise.
        gcc/config/riscv/riscv.md (movmemsi): New pattern.

From-SVN: r254501
gcc/ChangeLog
gcc/config/riscv/riscv-protos.h
gcc/config/riscv/riscv.c
gcc/config/riscv/riscv.h
gcc/config/riscv/riscv.md