[ARM/AArch64] Improve modeled latency between FP operations and FP->GP register moves
authorktkachov <ktkachov@138bc75d-0d04-0410-961f-82ee72b054a4>
Tue, 18 Nov 2014 16:26:02 +0000 (16:26 +0000)
committerktkachov <ktkachov@138bc75d-0d04-0410-961f-82ee72b054a4>
Tue, 18 Nov 2014 16:26:02 +0000 (16:26 +0000)
commit6e9a017cb78c40b4fca0b39ee9a2e09847ca25c5
tree860fa677c2ffb4af460b210fd65759f0807666f5
parent5c59fa2ee69533f8e91356f3ede37dfdb145f329
[ARM/AArch64] Improve modeled latency between FP operations and FP->GP register moves

* config/arm/cortex-a15-neon.md (cortex_a15_vfp_to_from_gp):
Split into...
(cortex_a15_gp_to_vfp): ...This.
(cortex_a15_fp_to_gp): ...And this.
Define and comment bypass from vfp operations to fp->gp moves.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@217725 138bc75d-0d04-0410-961f-82ee72b054a4
gcc/ChangeLog
gcc/config/arm/cortex-a15-neon.md