MIPS: tlb: Set the EHINV bit for TLBINVF cores when invalidating the TLB
authorLeonid Yegoshin <Leonid.Yegoshin@imgtec.com>
Thu, 14 Nov 2013 16:12:25 +0000 (16:12 +0000)
committerRalf Baechle <ralf@linux-mips.org>
Wed, 22 Jan 2014 19:18:59 +0000 (20:18 +0100)
commit6e7f8b8e47ae581639c9c1c379bfb2e95c199842
treefb8d999155ba99504411c92ec0d6d63833d3682e
parent4a0156fbfb78b8006ce9b2ffac9383b7d4a8192b
MIPS: tlb: Set the EHINV bit for TLBINVF cores when invalidating the TLB

For MIPS32R3 supported cores, the EHINV bit needs to be set when
invalidating the TLB. This is necessary because the legacy software
method of representing an invalid TLB entry using an unmapped address
value is not guaranteed to work.

Signed-off-by: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com>
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6132/
arch/mips/include/asm/tlb.h