[AArch64] Fix lowering for fshl/fshr with SVE types.
authorEli Friedman <efriedma@quicinc.com>
Thu, 29 Apr 2021 21:35:34 +0000 (14:35 -0700)
committerEli Friedman <efriedma@quicinc.com>
Fri, 30 Apr 2021 17:51:25 +0000 (10:51 -0700)
commit6e6ae6c727b795eaca5495f64c064ee917bb26e5
treecfddbfba4cf1eb683b0bbfdd078fdcfaefcc6648
parent7308862ff532a9e5ca7ca787f9fcc2b8eeabb8b5
[AArch64] Fix lowering for fshl/fshr with SVE types.

These operations don't exist natively, so just let the
target-independent code expand to plain shifts.

The generated sequences could probably be optimized a bit more, but
they seem good enough for now.

Differential Revision: https://reviews.llvm.org/D101574
llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
llvm/test/CodeGen/AArch64/llvm-ir-to-intrinsic.ll