i965/nir: Dot not assign direct uniform locations first for vec4-based shaders
authorIago Toral Quiroga <itoral@igalia.com>
Fri, 3 Jul 2015 06:23:33 +0000 (08:23 +0200)
committerJason Ekstrand <jason.ekstrand@intel.com>
Mon, 3 Aug 2015 16:40:47 +0000 (09:40 -0700)
commit6e58fc56a5a396020cd299db11895120ec3da520
tree4a2b47c96e6a32c359c953f0b36a4121896ee181
parent01f6235020f9f0c2bc1a6e6ea9bd15c22fb2bcf5
i965/nir: Dot not assign direct uniform locations first for vec4-based shaders

In the vec4 backend we want uniform locations to be assigned consecutively
since that way the offsets produced by nir_lower_io are exactly what we
need to implement nir_intrinsic_load_uniform. Otherwise we would need a
mapping to match the output of nir_lower_io to the actual uniform registers
we need to use.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
src/mesa/drivers/dri/i965/brw_nir.c