Add instruction encoding / disassembly support for ru6 / lru6 instructions.
authorRichard Osborne <richard@xmos.com>
Mon, 21 Jan 2013 20:42:16 +0000 (20:42 +0000)
committerRichard Osborne <richard@xmos.com>
Mon, 21 Jan 2013 20:42:16 +0000 (20:42 +0000)
commit6e58c6d86d6bd6f6e1f9805285e905f40773b029
tree4a6f1b644e211c2f1433b6d70a0d554c8e37526e
parentead15d1f95a320e10e04fa7bd0a012d1a19ad1db
Add instruction encoding / disassembly support for ru6 / lru6 instructions.

llvm-svn: 173085
llvm/lib/Target/XCore/Disassembler/XCoreDisassembler.cpp
llvm/lib/Target/XCore/XCoreInstrFormats.td
llvm/lib/Target/XCore/XCoreInstrInfo.td
llvm/test/MC/Disassembler/XCore/xcore.txt