drm/amd: Align SMU11 SMU_MSG_OverridePcieParameters implementation with SMU13
authorMario Limonciello <mario.limonciello@amd.com>
Sat, 8 Jul 2023 02:26:09 +0000 (21:26 -0500)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Thu, 3 Aug 2023 08:23:47 +0000 (10:23 +0200)
commit6e385845eea187c573949e31e21d6934af1f3415
tree973f434be3d2bf34f192f6eb18ff5dc81e96586c
parent32631ac27c914e4de8b37987b282e9799f33d8dc
drm/amd: Align SMU11 SMU_MSG_OverridePcieParameters implementation with SMU13

commit e701156ccc6c7a5f104a968dda74cd6434178712 upstream.

SMU13 overrides dynamic PCIe lane width and dynamic speed by when on
certain hosts. commit 38e4ced80479 ("drm/amd/pm: conditionally disable
pcie lane switching for some sienna_cichlid SKUs") worked around this
issue by setting up certain SKUs to set up certain limits, but the same
fundamental problem with those hosts affects all SMU11 implmentations
as well, so align the SMU11 and SMU13 driver handling.

Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org # 6.1.x
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c