Reland "[X86][RFC] Enable `_Float16` type support on X86 following the psABI"
authorPhoebe Wang <phoebe.wang@intel.com>
Wed, 15 Jun 2022 00:26:04 +0000 (08:26 +0800)
committerPhoebe Wang <phoebe.wang@intel.com>
Wed, 15 Jun 2022 01:15:31 +0000 (09:15 +0800)
commit6e02e27536b9de25a651cfc9c2966ce471169355
treea6ded69711f0a034ac9b27a46e7dc5565fbc3119
parent7fae15f9251d3b392058e2fc84898b53619d36ad
Reland "[X86][RFC] Enable `_Float16` type support on X86 following the psABI"

Disabled 2 mlir tests due to the runtime doesn't support `_Float16`, see
the issue here https://github.com/llvm/llvm-project/issues/55992
50 files changed:
llvm/docs/ReleaseNotes.rst
llvm/lib/Target/X86/X86FastISel.cpp
llvm/lib/Target/X86/X86ISelLowering.cpp
llvm/lib/Target/X86/X86ISelLowering.h
llvm/lib/Target/X86/X86InstrAVX512.td
llvm/lib/Target/X86/X86InstrCompiler.td
llvm/lib/Target/X86/X86InstrInfo.cpp
llvm/lib/Target/X86/X86InstrSSE.td
llvm/lib/Target/X86/X86InstrVecCompiler.td
llvm/lib/Target/X86/X86InstructionSelector.cpp
llvm/lib/Target/X86/X86RegisterInfo.td
llvm/test/Analysis/CostModel/X86/fptoi_sat.ll
llvm/test/CodeGen/MIR/X86/inline-asm-registers.mir
llvm/test/CodeGen/X86/atomic-non-integer.ll
llvm/test/CodeGen/X86/avx512-insert-extract.ll
llvm/test/CodeGen/X86/avx512-masked_memop-16-8.ll
llvm/test/CodeGen/X86/avx512fp16-fp-logic.ll
llvm/test/CodeGen/X86/callbr-asm-bb-exports.ll
llvm/test/CodeGen/X86/cvt16-2.ll
llvm/test/CodeGen/X86/cvt16.ll
llvm/test/CodeGen/X86/fastmath-float-half-conversion.ll
llvm/test/CodeGen/X86/fmf-flags.ll
llvm/test/CodeGen/X86/fp-round.ll
llvm/test/CodeGen/X86/fp-roundeven.ll
llvm/test/CodeGen/X86/fp128-cast-strict.ll
llvm/test/CodeGen/X86/fpclamptosat.ll
llvm/test/CodeGen/X86/fpclamptosat_vec.ll
llvm/test/CodeGen/X86/fptosi-sat-scalar.ll
llvm/test/CodeGen/X86/fptosi-sat-vector-128.ll
llvm/test/CodeGen/X86/fptoui-sat-scalar.ll
llvm/test/CodeGen/X86/fptoui-sat-vector-128.ll
llvm/test/CodeGen/X86/freeze.ll
llvm/test/CodeGen/X86/frem.ll
llvm/test/CodeGen/X86/half-constrained.ll
llvm/test/CodeGen/X86/half.ll
llvm/test/CodeGen/X86/pr31088.ll
llvm/test/CodeGen/X86/pr38533.ll
llvm/test/CodeGen/X86/pr47000.ll
llvm/test/CodeGen/X86/scheduler-asm-moves.mir
llvm/test/CodeGen/X86/shuffle-extract-subvector.ll
llvm/test/CodeGen/X86/stack-folding-fp-avx512fp16-fma.ll
llvm/test/CodeGen/X86/stack-folding-fp-avx512fp16.ll
llvm/test/CodeGen/X86/statepoint-invoke-ra-enter-at-end.mir
llvm/test/CodeGen/X86/vec_fp_to_int.ll
llvm/test/CodeGen/X86/vector-half-conversions.ll
llvm/test/CodeGen/X86/vector-reduce-fmax-nnan.ll
llvm/test/CodeGen/X86/vector-reduce-fmin-nnan.ll
llvm/test/MC/X86/x86_64-asm-match.s
mlir/test/Integration/Dialect/SparseTensor/CPU/dense_output_f16.mlir
mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_sum_f16.mlir