RISC-V: correct enum sbi_ext_rfence_fid
authorHeinrich Schuchardt <xypron.glpk@gmx.de>
Sat, 6 Mar 2021 05:48:01 +0000 (06:48 +0100)
committerPalmer Dabbelt <palmerdabbelt@google.com>
Wed, 10 Mar 2021 03:23:11 +0000 (19:23 -0800)
commit6dd4879f59b0a0679ed8c3ebaff3d79f37930778
tree86289bee2791239c058b2141def26d965d188f71
parenta38fd8748464831584a19438cbb3082b5a2dab15
RISC-V: correct enum sbi_ext_rfence_fid

The constants in enum sbi_ext_rfence_fid should match the SBI
specification. See
https://github.com/riscv/riscv-sbi-doc/blob/master/riscv-sbi.adoc#78-function-listing

| Function Name               | FID | EID
| sbi_remote_fence_i          |   0 | 0x52464E43
| sbi_remote_sfence_vma       |   1 | 0x52464E43
| sbi_remote_sfence_vma_asid  |   2 | 0x52464E43
| sbi_remote_hfence_gvma_vmid |   3 | 0x52464E43
| sbi_remote_hfence_gvma      |   4 | 0x52464E43
| sbi_remote_hfence_vvma_asid |   5 | 0x52464E43
| sbi_remote_hfence_vvma      |   6 | 0x52464E43

Fixes: ecbacc2a3efd ("RISC-V: Add SBI v0.2 extension definitions")
Reported-by: Sean Anderson <seanga2@gmail.com>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Anup Patel <anup@brainfault.org>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
arch/riscv/include/asm/sbi.h