[AArch64][SVE2] Add SVE2 target features to backend and TargetParser
authorCullen Rhodes <cullen.rhodes@arm.com>
Mon, 13 May 2019 10:10:24 +0000 (10:10 +0000)
committerCullen Rhodes <cullen.rhodes@arm.com>
Mon, 13 May 2019 10:10:24 +0000 (10:10 +0000)
commit6dcef8fc0c671002c017374b48b09be08bf516f1
tree9eaeb4ac5fac258e5c9c9364fc315090047aa454
parent3c72fe1bad4a5a461e7f92fb0d90fb5876cbab81
[AArch64][SVE2] Add SVE2 target features to backend and TargetParser

Summary:
This patch adds the following features defined by Arm SVE2 architecture
extension:

  sve2, sve2-aes, sve2-sm4, sve2-sha3, bitperm

For existing CPUs these features are declared as unsupported to prevent
scheduler errors.

The specification can be found here:
https://developer.arm.com/docs/ddi0602/latest

Reviewers: SjoerdMeijer, sdesmalen, ostannard, rovka

Reviewed By: SjoerdMeijer, rovka

Subscribers: rovka, javed.absar, tschuett, kristof.beyls, kristina, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D61513

llvm-svn: 360573
19 files changed:
llvm/include/llvm/Support/AArch64TargetParser.def
llvm/include/llvm/Support/AArch64TargetParser.h
llvm/include/llvm/Support/ARMTargetParser.h
llvm/lib/Support/AArch64TargetParser.cpp
llvm/lib/Target/AArch64/AArch64.td
llvm/lib/Target/AArch64/AArch64InstrInfo.td
llvm/lib/Target/AArch64/AArch64SchedA53.td
llvm/lib/Target/AArch64/AArch64SchedA57.td
llvm/lib/Target/AArch64/AArch64SchedCyclone.td
llvm/lib/Target/AArch64/AArch64SchedExynosM1.td
llvm/lib/Target/AArch64/AArch64SchedExynosM3.td
llvm/lib/Target/AArch64/AArch64SchedExynosM4.td
llvm/lib/Target/AArch64/AArch64SchedFalkor.td
llvm/lib/Target/AArch64/AArch64SchedKryo.td
llvm/lib/Target/AArch64/AArch64SchedThunderX.td
llvm/lib/Target/AArch64/AArch64SchedThunderX2T99.td
llvm/lib/Target/AArch64/AArch64Subtarget.h
llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
llvm/unittests/Support/TargetParserTest.cpp