ARM: shmobile: r8a7740 dtsi: Correct IIC0 parent clock
authorGeert Uytterhoeven <geert+renesas@glider.be>
Wed, 5 Nov 2014 10:04:34 +0000 (11:04 +0100)
committerSimon Horman <horms+renesas@verge.net.au>
Fri, 5 Dec 2014 08:34:04 +0000 (17:34 +0900)
commit6db6c7a7d3d71c52302b6a005ea40a14988d6e97
tree752ab23145cb130044417139e5939f6345d127d8
parent766e8e6441b1276eb33bf7c76ba8c54715352391
ARM: shmobile: r8a7740 dtsi: Correct IIC0 parent clock

According to the datasheet, the operating clock for IIC0 is the HPP
(RT Peri) clock, not the SUB (Peri) clock. Both clocks run at the same
speed (50 Mhz).

This is consistent with IIC0 being located in the A4R PM domain, and
IIC1 in the A3SP PM domain.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
(cherry picked from commit b89ff7c3c2dee189489a5f45eb8d72e106179299)
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
arch/arm/boot/dts/r8a7740.dtsi