[RISCV] Insert sext_inreg when type legalizing add/sub/mul with constant LHS.
authorCraig Topper <craig.topper@sifive.com>
Wed, 18 Aug 2021 17:37:00 +0000 (10:37 -0700)
committerCraig Topper <craig.topper@sifive.com>
Wed, 18 Aug 2021 17:44:25 +0000 (10:44 -0700)
commit6d7ea597efee6398c4bf09a0d60a870c67ef2764
tree9f28a1eb3f3165547c9eb65cc1eef17ac04c409e
parent0a2b1ba33ae6dcaedb81417f7c4cc714f72a5968
[RISCV] Insert sext_inreg when type legalizing add/sub/mul with constant LHS.

We already do this for non-constants RHS. This just removes the
special case. I believe the special case may have been needed
because the ANY_EXTEND of a constant used to create zero extended
constants, but we recently changed that to produce sign extended
constants.

D107658 is needed to prevent some regressions.

Reviewed By: luismarques

Differential Revision: https://reviews.llvm.org/D107697
llvm/lib/Target/RISCV/RISCVISelLowering.cpp
llvm/test/CodeGen/RISCV/add-imm.ll
llvm/test/CodeGen/RISCV/alu32.ll
llvm/test/CodeGen/RISCV/double-stack-spill-restore.ll
llvm/test/CodeGen/RISCV/mul.ll
llvm/test/CodeGen/RISCV/rv64i-exhaustive-w-insts.ll
llvm/test/CodeGen/RISCV/setcc-logic.ll
llvm/test/CodeGen/RISCV/split-offsets.ll
llvm/test/CodeGen/RISCV/vararg.ll