pinctrl: aspeed-g4: Add mux configuration for all pins
authorAndrew Jeffery <andrew@aj.id.au>
Tue, 20 Dec 2016 07:35:49 +0000 (18:05 +1030)
committerLinus Walleij <linus.walleij@linaro.org>
Tue, 27 Dec 2016 22:17:23 +0000 (23:17 +0100)
commit6d329f14a75f3858a1254abca8b94d4fab556a9a
treef02bc96b6a998a20ff5c691c09b7684cc945a207
parent7d29ed88acbbf00e2056634bd4c0172d55d2568c
pinctrl: aspeed-g4: Add mux configuration for all pins

The patch introducing the g4 pinctrl driver implemented a smattering of
pins to flesh out the implementation of the core and provide bare-bones
support for some OpenPOWER platforms. Now, update the bindings document
to reflect the complete functionality and implement the necessary pin
configuration tables in the driver.

Cc: Timothy Pearson <tpearson@raptorengineering.com>
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Acked-by: Joel Stanley <joel@jms.id.au>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Documentation/devicetree/bindings/pinctrl/pinctrl-aspeed.txt
drivers/pinctrl/aspeed/pinctrl-aspeed-g4.c