ac/nir: use nir_intrinsic_load_hs_out_patch_data_offset_amd in tess lower
authorQiang Yu <yuq825@gmail.com>
Mon, 23 May 2022 09:26:00 +0000 (17:26 +0800)
committerMarge Bot <emma+marge@anholt.net>
Mon, 27 Jun 2022 02:38:21 +0000 (02:38 +0000)
commit6ccb9634de732b3fd30210d59715268be04dae2d
tree9236fbb5ff33869d2876eae2a47de3ea4bddc53f
parentfdf589321c5acfce67c18dc2455fc3a54fd86135
ac/nir: use nir_intrinsic_load_hs_out_patch_data_offset_amd in tess lower

radeonsi load this from SGPR arg, can't use static value because TCS output
and TES input may not match (TCS output is not a key for TES) and
determined in runtime.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16705>
src/amd/common/ac_nir.h
src/amd/common/ac_nir_lower_tess_io_to_mem.c
src/amd/vulkan/radv_shader.c