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RISC-V: Implement multi-letter ISA extension probing framework
authorAtish Patra <atishp@rivosinc.com>
Tue, 8 Feb 2022 22:58:38 +0000 (14:58 -0800)
committerminda.chen <minda.chen@starfivetech.com>
Tue, 3 Jan 2023 06:26:17 +0000 (14:26 +0800)
commit6c8ec1267ed8a95c44e53b09f70ba037ed45a554
tree2b66df7fa6f37e3664d43eff0d093eb1d0b376actree | snapshot
parent1fce172f6b894a5bd22f7799d3621a4197531045commit | diff
RISC-V: Implement multi-letter ISA extension probing framework

Multi-letter extensions can be probed using exising
riscv_isa_extension_available API now. It doesn't support versioning
right now as there is no use case for it.
Individual extension specific implementation will be added during
each extension support.

Signed-off-by: Atish Patra <atishp@rivosinc.com>
arch/riscv/include/asm/hwcap.h diff | blob | history
arch/riscv/kernel/cpufeature.c diff | blob | history
Domain: System / Kernel;