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(parent: 9ec6e5b) | patch
media: ccs-pll: Add trivial dual PLL support
authorSakari Ailus <sakari.ailus@linux.intel.com>
Tue, 15 Sep 2020 18:53:26 +0000 (20:53 +0200)
committerMauro Carvalho Chehab <mchehab+huawei@kernel.org>
Mon, 7 Dec 2020 15:04:33 +0000 (16:04 +0100)
commit6c7469e46b603f08462ef586a415a318134392b8
tree7f2206d07a6a9299e8f17f0b5d7a36f45d22b414tree | snapshot
parent9ec6e5b18e6660ccc7b1777a4a4108c6c1723c40commit | diff
media: ccs-pll: Add trivial dual PLL support

Add support for sensors that have separate VT and OP domain PLLs.

This support is trivial in the sense that it aims for the same VT pixel
rate than that on the CSI-2 bus. The vast majority of sensors is better
supported by higher frequencies in VT domain in binned and possibly scaled
configurations.

Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
drivers/media/i2c/ccs-pll.c diff | blob | history
drivers/media/i2c/ccs-pll.h diff | blob | history
Domain: System / Kernel;