[X86] Improve 64-bit shifts on 32-bit targets (PR14593)
authorSimon Pilgrim <llvm-dev@redking.me.uk>
Sun, 31 Jul 2016 19:50:45 +0000 (19:50 +0000)
committerSimon Pilgrim <llvm-dev@redking.me.uk>
Sun, 31 Jul 2016 19:50:45 +0000 (19:50 +0000)
commit6be48e4aa70c50d58b9759187e8f601a2da7b23c
treef4c648ece065a63d761bf8c761c599cc36f7df2d
parent600495266100380fd7152feb7333b0353ce839b7
[X86] Improve 64-bit shifts on 32-bit targets (PR14593)

As discussed on PR14593, this patch adds support for lowering to SHLD/SHRD from the patterns generated by DAGTypeLegalizer::ExpandShiftWithKnownAmountBit.

Differential Revision: https://reviews.llvm.org/D23000

llvm-svn: 277299
llvm/lib/Target/X86/X86ISelLowering.cpp
llvm/test/CodeGen/X86/legalize-shift-64.ll
llvm/test/CodeGen/X86/shift-double-x86_64.ll
llvm/test/CodeGen/X86/shift-double.ll