arm64: zynqmp: zynqmp-sm-k26-revA: Fix DP PLL configuration
authorNeal Frager <neal.frager@amd.com>
Mon, 16 May 2022 14:02:19 +0000 (16:02 +0200)
committerMichal Simek <michal.simek@amd.com>
Wed, 18 May 2022 11:17:54 +0000 (13:17 +0200)
commit6be41ea4e6ff5aceff152a8480ce1c93427b1247
treef00975756ac5a9aa66a5bbafdaa5a9e159a5d233
parente9869f474c35b81577066441dce6960c03089023
arm64: zynqmp: zynqmp-sm-k26-revA: Fix DP PLL configuration

This patch fixes the DP audio and video PLL configurations for the zynqmp-sm-k26-revA som.

The Linux DP driver expects the DP to be using the following PLL config:
  - DP video PLL should use the VPLL (0x0)
  - DP audio PLL should use the RPLL (0x3)
  - DP system time clock PLL should use RPLL (0x3)

Register 0xFD1A0070 configures the DP video PLL.
Register 0xFD1A0074 configures the DP audio PLL.
Register 0xFD1A007C configures the DP system time clock PLL.

Signed-off-by: Neal Frager <neal.frager@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/fa7e9abc419c9d7648405d1c62367dbe701d09b8.1652709736.git.michal.simek@amd.com
board/xilinx/zynqmp/zynqmp-sm-k26-revA/psu_init_gpl.c