i965: Use 0 for the number of binding table entries in 3DSTATE_(VS|WM).
authorKenneth Graunke <kenneth@whitecape.org>
Tue, 1 Nov 2011 17:54:08 +0000 (10:54 -0700)
committerKenneth Graunke <kenneth@whitecape.org>
Fri, 11 Nov 2011 06:51:19 +0000 (22:51 -0800)
commit6ba9090ea05e817bd38c1fcc63c53168b16593c7
treefefb9ecff7cd5ef9227228fae00bb664fc86acdc
parent0983c6869bead0c31c62e5b1dda7f70898d43971
i965: Use 0 for the number of binding table entries in 3DSTATE_(VS|WM).

These fields control how many entries the hardware prefetches into the
state cache, so they only impact performance, not correctness.  However,
it's not clear how to use this in a way that's beneficial.

According to the documentation, kernels "using a large number" of
entries may wish to program this to zero to avoid thrashing the cache;
it's unclear how many is too many.  Also, Ironlake's WM was missing this
feature entirely---the count had to be zero.

The dirty bit tracking to handle this complicates the surface state
and binding table setup; removing it should simplify things and make
future refactoring easier.  So just set 0 for the number of entries
rather than trying to compute and track it.

Appears to have no impact on Nexuiz and OpenArena on Sandybridge.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Paul Berry <stereotype441@gmail.com>
src/mesa/drivers/dri/i965/brw_context.h
src/mesa/drivers/dri/i965/brw_state_upload.c
src/mesa/drivers/dri/i965/brw_vs_state.c
src/mesa/drivers/dri/i965/brw_vs_surface_state.c
src/mesa/drivers/dri/i965/brw_wm_state.c
src/mesa/drivers/dri/i965/brw_wm_surface_state.c
src/mesa/drivers/dri/i965/gen6_vs_state.c
src/mesa/drivers/dri/i965/gen6_wm_state.c
src/mesa/drivers/dri/i965/gen7_vs_state.c
src/mesa/drivers/dri/i965/gen7_wm_state.c