octeontx2-af: Update Tx link register range
authorRahul Bhansali <rbhansali@marvell.com>
Tue, 5 Dec 2023 08:04:34 +0000 (13:34 +0530)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Wed, 13 Dec 2023 17:39:10 +0000 (18:39 +0100)
commit6b9e78d6c6b93f4328b80e5e51432841f6e49d4f
tree7eae72874a80dad9c7bfab8ba19d55a0cdd31cc4
parent9be8f66ea8570b125b818dcd917b3b6932c6d620
octeontx2-af: Update Tx link register range

[ Upstream commit 7336fc196748f82646b630d5a2e9d283e200b988 ]

On new silicons the TX channels for transmit level has increased.
This patch fixes the respective register offset range to
configure the newly added channels.

Fixes: b279bbb3314e ("octeontx2-af: NIX Tx scheduler queue config support")
Signed-off-by: Rahul Bhansali <rbhansali@marvell.com>
Signed-off-by: Geetha sowjanya <gakula@marvell.com>
Reviewed-by: Wojciech Drewek <wojciech.drewek@intel.com>
Signed-off-by: Paolo Abeni <pabeni@redhat.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
drivers/net/ethernet/marvell/octeontx2/af/rvu_reg.c