[AMDGPU][MC] Added support of SP3 syntax for MTBUF format modifier
authorDmitry Preobrazhensky <dmitry.preobrazhensky@amd.com>
Fri, 24 Jul 2020 13:39:42 +0000 (16:39 +0300)
committerDmitry Preobrazhensky <dmitry.preobrazhensky@amd.com>
Fri, 24 Jul 2020 13:41:03 +0000 (16:41 +0300)
commit6b8948922c59c9f786996387b41d8e29ed3e7a8a
tree94fce66333a9d6bb8130f403bb85a60108842412
parentbb099c87abbfb78b2bdda395ea3f04d2a77c3082
[AMDGPU][MC] Added support of SP3 syntax for MTBUF format modifier

Currently supported LLVM MTBUF syntax is shown below. It is not compatible with SP3.

    op     dst, addr, rsrc, FORMAT, soffset

This change adds support for SP3 syntax:

    op     dst, addr, rsrc, soffset SP3FORMAT

In addition to being compatible with SP3, this syntax allows using symbolic names for data, numeric and unified formats. Below is a list of added syntax variants.

format:<expression>
format:[<numeric-format-name>,<data-format-name>]
format:[<data-format-name>,<numeric-format-name>]
format:[<data-format-name>]
format:[<numeric-format-name>]
format:[<unified-format-name>]

The last syntax variant is supported for GFX10 only.

See llvm bug 37738

Reviewers: arsenm, rampitec, vpykhtin

Differential Revision: https://reviews.llvm.org/D84026
31 files changed:
llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
llvm/lib/Target/AMDGPU/BUFInstructions.td
llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.h
llvm/lib/Target/AMDGPU/SIDefines.h
llvm/lib/Target/AMDGPU/Utils/AMDGPUAsmUtils.cpp
llvm/lib/Target/AMDGPU/Utils/AMDGPUAsmUtils.h
llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.tbuffer.load.d16.ll
llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.tbuffer.load.ll
llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.tbuffer.store.d16.ll
llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.tbuffer.store.ll
llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.tbuffer.load.d16.ll
llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.tbuffer.load.ll
llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.tbuffer.store.d16.ll
llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.tbuffer.store.ll
llvm/test/CodeGen/AMDGPU/llvm.amdgcn.tbuffer.load.d16.ll
llvm/test/CodeGen/AMDGPU/llvm.amdgcn.tbuffer.load.dwordx3.ll
llvm/test/CodeGen/AMDGPU/llvm.amdgcn.tbuffer.load.ll
llvm/test/CodeGen/AMDGPU/llvm.amdgcn.tbuffer.store.d16.ll
llvm/test/CodeGen/AMDGPU/llvm.amdgcn.tbuffer.store.dwordx3.ll
llvm/test/CodeGen/AMDGPU/llvm.amdgcn.tbuffer.store.ll
llvm/test/MC/AMDGPU/buf-fmt-d16-packed.s
llvm/test/MC/AMDGPU/buf-fmt-d16-unpacked.s
llvm/test/MC/AMDGPU/mtbuf-gfx10.s
llvm/test/MC/AMDGPU/mtbuf.s
llvm/test/MC/Disassembler/AMDGPU/buf_fmt_packed_d16.txt
llvm/test/MC/Disassembler/AMDGPU/buf_fmt_unpacked_d16.txt
llvm/test/MC/Disassembler/AMDGPU/mtbuf_gfx10.txt
llvm/test/MC/Disassembler/AMDGPU/mtbuf_vi.txt