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(parent: 9af594d) | patch
net/mlx5e: Configure IPsec packet offload flow steering
authorLeon Romanovsky <leonro@nvidia.com>
Fri, 2 Dec 2022 20:14:48 +0000 (22:14 +0200)
committerSteffen Klassert <steffen.klassert@secunet.com>
Thu, 8 Dec 2022 09:36:05 +0000 (10:36 +0100)
commit6b5c45e16e434efc6d323a8bc79e0eba49cd13f2
treef345c3230dc900135d8fbdf53c4ced9c0ca7cb26tree | snapshot
parent9af594d8a99ef726b5785a309fb230265d16fd8bcommit | diff
net/mlx5e: Configure IPsec packet offload flow steering

In packet offload mode, the HW is responsible to handle ESP headers,
SPI numbers and trailers (ICV) together with different logic for
RX and TX paths.

In order to support packet offload mode, special logic is added
to flow steering rules.

Reviewed-by: Raed Salem <raeds@nvidia.com>
Reviewed-by: Saeed Mahameed <saeedm@nvidia.com>
Signed-off-by: Leon Romanovsky <leonro@nvidia.com>
Signed-off-by: Steffen Klassert <steffen.klassert@secunet.com>
drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec.c diff | blob | history
drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec.h diff | blob | history
drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec_fs.c diff | blob | history
Domain: System / Kernel;