[GISel]: Add missing opcodes for overflow intrinsics
authorAditya Nandakumar <aditya_nandakumar@apple.com>
Tue, 28 Aug 2018 18:54:10 +0000 (18:54 +0000)
committerAditya Nandakumar <aditya_nandakumar@apple.com>
Tue, 28 Aug 2018 18:54:10 +0000 (18:54 +0000)
commit6b4d343e1365ac1e8f04659216d5b190f90b4694
treea12ea85006e63659c4726b768ed79ac7276ee7f0
parentadb6da10b81d35008178826adfc678275e776c9d
[GISel]: Add missing opcodes for overflow intrinsics

https://reviews.llvm.org/D51197

Currently, IRTranslator (and GISel) seems to be arbitrarily picking
which overflow intrinsics get mapped into opcodes which either have a
carry as an input or not.
For intrinsics such as Intrinsic::uadd_with_overflow, translate it to an
opcode (G_UADDO) which doesn't have any carry inputs (similar to LLVM
IR).

This patch adds 4 missing opcodes for completeness - G_UADDO, G_USUBO,
G_SSUBE and G_SADDE.

llvm-svn: 340865
llvm/include/llvm/Support/TargetOpcodes.def
llvm/include/llvm/Target/GenericOpcodes.td
llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
llvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll
llvm/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir