spi: tegra210-quad: Add support for hardware dummy cycles transfer
authorSowjanya Komatineni <skomatineni@nvidia.com>
Mon, 21 Dec 2020 21:17:36 +0000 (13:17 -0800)
committerMark Brown <broonie@kernel.org>
Wed, 6 Jan 2021 13:09:32 +0000 (13:09 +0000)
commit6a8a8b51703c69fa2d6adbbcbf731ce9b991c696
treefd74cf139e5246317b9776bd658448116f92bfa0
parent98621ed011c57ba6e52e01a5982b221c9943b6d9
spi: tegra210-quad: Add support for hardware dummy cycles transfer

Tegra Quad SPI controller hardware supports sending dummy bytes based
on programmed dummy clock cycles after the actual transfer bytes.

This patch adds this support of hardware dummy bytes transfer and
skips transfer of dummy bytes from the software.

For dummy cycles more than Tegra Quad SPI hardware maximum dummy
cycles limit, driver transfers dummy bytes from the software.

Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
Link: https://lore.kernel.org/r/1608585459-17250-7-git-send-email-skomatineni@nvidia.com
Signed-off-by: Mark Brown <broonie@kernel.org>
drivers/spi/spi-tegra210-quad.c