riscv: Support booting SiFive Unmatched from SPI.
authorThomas Skibo <thomas-git@skibo.net>
Wed, 24 Nov 2021 22:32:09 +0000 (14:32 -0800)
committerLeo Yu-Chi Liang <ycliang@andestech.com>
Thu, 2 Dec 2021 08:43:56 +0000 (16:43 +0800)
commit6a863894ad53b2d0e6c6d47ad105850053757fec
tree6b3c388872fce40712b633a34f8beab04e3d76e1
parentffb78a7c71d555be31c8f8f2bb0fcc2fcfe3892e
riscv: Support booting SiFive Unmatched from SPI.

Configure SPI flash devices into SPL.  Add SPI boot option to spl.c.
Document how to format flash for booting.

Signed-off-by: Thomas Skibo <thomas-git@skibo.net>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
arch/riscv/dts/hifive-unmatched-a00-u-boot.dtsi
board/sifive/unmatched/spl.c
configs/sifive_unmatched_defconfig
doc/board/sifive/unmatched.rst