riscv: sifive: fu540: redundant initialization
authorHeinrich Schuchardt <xypron.glpk@gmx.de>
Mon, 3 Aug 2020 21:09:49 +0000 (23:09 +0200)
committerAndes <uboot@andestech.com>
Fri, 14 Aug 2020 06:39:14 +0000 (14:39 +0800)
commit6a43e3a16743e5fc5b765bf897691b630e3e1edb
tree3acbff314920cf764690f4cb2ff0db575a6ee25c
parent023dba13668756e54ac4522543d91840f8f34db5
riscv: sifive: fu540: redundant initialization

We should not initialize a variable if the value is overwritten before
being read.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Tested-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Reviewed-by: Rick Chen <rick@andestech.com>
arch/riscv/cpu/fu540/cache.c