i965: Always use Y-tiled buffers on SKL+
authorBen Widawsky <ben@bwidawsk.net>
Fri, 22 Apr 2016 03:14:58 +0000 (20:14 -0700)
committerBen Widawsky <ben@bwidawsk.net>
Fri, 22 Apr 2016 03:14:58 +0000 (20:14 -0700)
commit6a0d036483caf87d43ebe2edd1905873446c9589
tree7ff5af3ac27d8cb5c07893a3fc6bc1d1773b8c79
parentc3b88cc2c15f19e748c9c406e9ab053975adab7e
i965: Always use Y-tiled buffers on SKL+

Starting with Skylake, the display engine is capable of scanning out from
Y-tiled buffers. As such, we can and should use Y-tiling for better efficiency.
This also has the added benefit of being able to fast clear the winsys buffer.

Note that the buffer allocation done for mipmaps will already never allocate an
X-tiled buffer for GEN9.

This has an almost universal positive impact on benchmarks, some improving by as
much as 20%.

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
src/mesa/drivers/dri/i965/brw_meta_fast_clear.c
src/mesa/drivers/dri/i965/intel_mipmap_tree.c
src/mesa/drivers/dri/i965/intel_mipmap_tree.h
src/mesa/drivers/dri/i965/intel_screen.c