[DAG] ExpandIntRes_MINMAX - simplify cases with sufficient number of sign bits
authorSimon Pilgrim <llvm-dev@redking.me.uk>
Fri, 28 Oct 2022 16:10:36 +0000 (17:10 +0100)
committerSimon Pilgrim <llvm-dev@redking.me.uk>
Fri, 28 Oct 2022 16:10:45 +0000 (17:10 +0100)
commit69d117edc29d4c74e034d8474433e981b2702898
tree7e727bfea4cb89ad29d5121e03c53b941ec833fe
parent7c44b4840b342678a1770925487765ee673e33fe
[DAG] ExpandIntRes_MINMAX - simplify cases with sufficient number of sign bits

When legalizing a smax/smin/umax/umin op, if we know that the upper half is all sign bits, then we can perform the op on the lower half and then sign extend the result to the upper half.

Alive2: https://alive2.llvm.org/ce/z/rk8Rfd

Fixes #58630
llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
llvm/test/CodeGen/X86/smax.ll
llvm/test/CodeGen/X86/smin.ll
llvm/test/CodeGen/X86/umax.ll
llvm/test/CodeGen/X86/umin.ll