clk: meson-axg: pcie: drop the mpll3 clock parent
authorYixun Lan <yixun.lan@amlogic.com>
Wed, 1 Aug 2018 12:16:24 +0000 (12:16 +0000)
committerJerome Brunet <jbrunet@baylibre.com>
Wed, 26 Sep 2018 10:02:00 +0000 (12:02 +0200)
commit69b93104c7ec5668019caf5d2dbfd0e182df06db
tree3c94196312ed31cefa15e75f33475553fb9ab5d6
parent56dbabc0ff733ab0828e9567c886933fe77fa087
clk: meson-axg: pcie: drop the mpll3 clock parent

We found the PCIe driver doesn't really work with
the mpll3 clock which is actually reserved for debug,
So drop it from the mux list.

Fixes: 33b89db68236 ("clk: meson-axg: add clocks required by pcie driver")
Tested-by: Jianxin Qin <jianxin.qin@amlogic.com>
Signed-off-by: Yixun Lan <yixun.lan@amlogic.com>
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
drivers/clk/meson/axg.c