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(parent: e5608ca) | patch
[X86] Merge the two 'Emit the normal disp32 encoding' cases in SIB byte handling...
authorCraig Topper <craig.topper@intel.com>
Tue, 28 Jul 2020 19:03:54 +0000 (12:03 -0700)
committerCraig Topper <craig.topper@intel.com>
Tue, 28 Jul 2020 19:12:09 +0000 (12:12 -0700)
commit69152a11cf181d9c1859947f0f2c2f1554a891f2
tree5f39a8fdb81d1ba28b31ba08a340037bf33ac893tree | snapshot
parente5608cacfd60bb28685206ca96a8f3ceeee1e8a6commit | diff
[X86] Merge the two 'Emit the normal disp32 encoding' cases in SIB byte handling in emitMemModRMByte. NFCI

By repeating the Disp.isImm() check in a couple spots we can
make the normal case for immediate and for expression the same.
And then always rely on the ForceDisp32 flag to remove a later
non-zero immediate check.

This should make {disp32} pseudo prefix handling
slightly easier as we need the normal disp32 handler to handle a
immediate of 0.
llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp diff | blob | history
Domain: System / Toolchain;